A digital signal processor is a special purpose processor optimized for digital signal processing applications such as or digital filtering, speech analysis and synthesis or video encoding and decoding to produce compressed bit streams. Certain communication or video applications may use Huffman coding, which uses a Variable Length Coding scheme (as opposed to coding schemes that use a fixed number of bits per codeword). The Huffman coding minimizes the total number of bits for code-words appearing with the highest frequency. This coding selects the number of bits based on known probabilities so that a data bit-stream is decoded as the bits arrive in the data stream. This coding achieves a tighter packing of data since the most commonly occurring characters are short and the infrequently occurring characters are long, wherein the shortest character with the highest probability of occurrence is only one bit long. Most digital signal processors are designed to manipulate data having a fixed word size (e.g., 8-bit, 16-bit or 32-bit words). When the processor needs to manipulate a non-standard word sizes it is typically done using a bit FIFO circuit which can handle bit fields of any specified length. One shortcoming of such devices is that they are implemented in storage external to the compute unit so that whenever access is required to read or write a stall can occur. This is exacerbated by the fact that access to extend storage can only be had through the data address generator (DAG). Another problem with relying on an external bit FIFO circuit is that it increases the distance that the signals must travel and therefore limits the speed of operation cycles.